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Title:
MANUFACTURE OF SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JPS595632
Kind Code:
A
Abstract:
PURPOSE:To lengthen the life times of minority carriers, and to shorten them positively in the deep layer region of a silicon substrate by containing a process forming a defect through heat treatment, a process forming a non-defect region in the vicinity of the surface of the substrate and a process introducing a specific metal. CONSTITUTION:A substrate is thermally treated at two steps on the basis of IG technique as a first process. A defect nucleus is generated through heat treatment for 10hr at 700 deg.C in a nitrogen atmosphere, and the defect nuclus is grown in the substrae through heat treatment for 2hr at 1,050 deg.C in the same nitrogen atmosphere. A new dead zone is formed to the surface layer of the substrate through the process, and a fine defect is formed in the deep layer region in approximately 10mum from the surface of the substrate. Gold is formed to the back of the substrate in the thickness of 10-100Angstrom by using a vacuum depsoition method during a semiconductor element forming process as a second process, and diffused into the substrate through heat treatment for 30min at 200-900 deg.C. The life times of carriers in the deep layer region are shortened up to 1mus or less.

Inventors:
OOSAWA AKIRA
HONDA KOUICHIROU
TAKIZAWA RITSUO
Application Number:
JP11511182A
Publication Date:
January 12, 1984
Filing Date:
July 01, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/322; (IPC1-7): H01L21/322
Attorney, Agent or Firm:
Koshiro Matsuoka



 
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