PURPOSE: To attain the increase of withstanding voltage and the augmentation of currents by a fine occupying area by elevating only impurity concentration in a contact section with a wiring electrode and bringing impurity concentration in a drain region to one through which the drain region is fitted to the increase of withstanding voltage and currents hardly lower.

CONSTITUTION: A field oxide film 2 is formed into a P conduction type Si substrate 1, and a gate electrode and a gate protective insulating film 5 are shaped onto the surface of the substrate 1 in an active region. An Si oxide film 8 is formed only onto the side wall sections of the electrode 4 and the film 5. A low impurity-concentration source region 6 and a low impurity-concentration drain region 7 are shaped into the substrate 1 so that surface impurity concentration of 1017∼1020cm-3 is obtained by implanting the ions of phosphorus into the substrate 1 while using the film 5 and the film 8 as masks. A source Si electrode 14 and a drain Si electrode 15 are formed, and the ions of arsenic are implanted under the state and thermally treated, thus shaping not less than 1019cm-3 high impurity concentration layer and a region. Accordingly, a superfine type semiconductor device in which withstanding voltage between a source and a drain is increased and current driving capability hardly lowers can be obtained.