PURPOSE: To inhibit the reading of the software, etc. stored in a storage device to an external device if the writing is over and once locked up, by writing the reading inhibit information to a register to inhibit the reading of the data and information on various instructions stored in an EPROM to the outside.

CONSTITUTION: First, a writing command is given to a CPU 2 within a 1-chip microprocessor 1 via a writing command line (w), and at the same time an address data showing a head address (address #0) is transmitted via an address data command line (m). At the same time, a prescribed write data to be stored in the head address is sent to a write buffer 10 via a write data bus (b). This write data is stored temporarily in the buffer 10 simultaneously with a latch signal (p) which gives a reply to the writing command given from the CPU 2. The write data stored in the buffer 10 is held there until the signal (p) arrives from the CPu 2. Then the CPU 2 gives immediately the address data to an address designating part (not shown in the figure) of an EPROM 3 via an address data line (c) after the transmission of the signal (p).