PURPOSE: To perform compensation in writing by discriminating a combination of bit intervals in such a way that the peak shift of an NRZI system appears as magnified, by controlling the bit interval through a shift register, delay air cuit, and selecting circuit.

CONSTITUTION: Original data 1 is made into a 2/7 or 3PM system code by code conversion 4 and the code is inputted to the shift register 5 synchronously with the signal CL1 of a clock generating circuit 6. Discriminating circuits 7 and 8 output signals 1 when deciding that there is a bit 1 preceding or lagging a bit with a bit interval 1.5T (T: minimum bit interval before conversion) by=>3.5 bits, or signal 0 when not. Their outputs are delayed by data delay circuits 9 and 10, and a selecting circuit 12 selects a combination of three kinds of out- of-phase signal from a clock delay circuit 11 as a signal CL2. A data phase modulating circuit 13 outputs the bit 1 as data 2 synchronously with the signal CL2 every time the signal Q10 of the shift register 5 is inputted. Consequently, compensation in writing is carried out.