PURPOSE: To simplify a data path system by using a universal shift register to form a chekcing data path system.
CONSTITUTION: When the writing is performed with a memory part 1, the store data of the controller side 200 is written with no intervention of a syndrome generator 2. While the fetch data read out of the part 1 is transferred to the controller side 200 with no intervention of a checker collector 3. In a check mode of the generator 2, both the store data and an error correction code are transferred to the side 200 with no intervention of the part 1. In a checking mode of the collector 3, the store data undergoes a correction of errors via a parallel/serial register 7 and universal shift register 5 and 6 and is transferred to the controller side 200.
SHIRAKAWA TADAFUMI
JPS5693192A | 1981-07-28 | |||
JPS5693196A | 1981-07-28 | |||
JPS5730196A | 1982-02-18 |
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