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Title:
MEMORY TESTER
Document Type and Number:
Japanese Patent JPS59178696
Kind Code:
A
Abstract:

PURPOSE: To enhance the speed of memory test by sending clear information and carry information to an X counter and a Y counter respectively when the output information of the X counter and information in a register coincide with each other.

CONSTITUTION: If the memory test should be omitted partially for elements 3 in a column Cn, prescribed carry information is held in a register 13. Then, when the memory test advances in accordance with the counting-up operation of an X counter 11 to reach an address CnRn, a comparator 14 detects the coincidence between output information of the counter 11 and carry information of the register 13 to send clear information and carry information to the counter 11 and a Y counter 12 respectively. Thus, the element 3 in an address Cn+1R0 is designated as an object of memory test, and as the result, the test for elements 3 in address CnRn+1WCnRm is omitted, and therefore, the memory test is made at a high-speed.


Inventors:
MUTOU HIROSHI
Application Number:
JP5422983A
Publication Date:
October 09, 1984
Filing Date:
March 30, 1983
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G01R31/28; G11C29/56; G11C29/00; (IPC1-7): G01R31/28; G11C29/00
Attorney, Agent or Firm:
Dobashi Akira



 
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