Title:
WRITING METHOD IN MEMORY
Document Type and Number:
Japanese Patent JPS607691
Kind Code:
A
Abstract:
PURPOSE: To attain high speed writing and to write also words collectively by combining an AND circuit and a multiplexer with a dynamic memory.
CONSTITUTION: When a word is to be written in the dynamic memory 1 as an address to be written, the whole words are accessed and the word data to be written as data are applied. At the bit writing, only one bit in a word is accessed as an address and all "1"s or all "0"s are applied to the word as data. To execute said function, an address specifying part obtained by combining the memory 1 with the AND circuit and the multiplexer 3 are unitedly formed to constitute a writing data input part. Thus, high speed writing is attained and words can be collectively written.
Inventors:
YOKOYAMA KAZUO
Application Number:
JP11447883A
Publication Date:
January 16, 1985
Filing Date:
June 25, 1983
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G11C11/401; G11C8/00; G11C11/34; (IPC1-7): G11C11/34; G11C7/00
Attorney, Agent or Firm:
Yoshishige Tasaka
Next Patent: JPS607692