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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS60148160
Kind Code:
A
Abstract:

PURPOSE: To improve the degree of integration by forming a resistor in an isolation region.

CONSTITUTION: Active elements Q1, Q2 are formed in an element forming region a1 isolated by an isolation region a2 while a resistor Rb is shaped to the isolation region a2. The resistor Rb is formed by shaping an n plus type diffusion layer 20c to a semiconductor section in the isolation region a2. Accordingly, the resistor requiring a space put out of shape can be formed in an integrated circuit device without lowering the degree of integration of the whole and damaging the regularity of a circuit pattern.


Inventors:
SHIMIZU ISAO
Application Number:
JP344284A
Publication Date:
August 05, 1985
Filing Date:
January 13, 1984
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L27/04; H01L21/331; H01L21/761; H01L21/822; H01L21/8222; H01L27/06; H01L27/07; H01L29/73; H01L29/732; H03K19/082; (IPC1-7): H01L21/76; H01L27/04; H01L27/08; H01L29/72; H03K19/082
Attorney, Agent or Firm:
Akio Takahashi



 
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