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Patent Searching and Data


Title:
PROGRAM ANALYZER
Document Type and Number:
Japanese Patent JPS608953
Kind Code:
A
Abstract:

PURPOSE: To check computer operation in respect of a data by tracking an executing locus of each module, and collecting inspecting information.

CONSTITUTION: Registration processing to a bit map memory 5 is executed, and a data "1" and a data "0" are set to an area corresponding to the head address of all modules, and other area, respectively. Subsequently, a multiplexer 12 is switched to an actual machine 1, its operation is started, and a program to be inspected of a memory 3 is executed. In the process of execution, when the instruction of an address to which the data "1" is set is executed in the bit map memory 5, "1" is sent out to a signal generating circuit 9. The circuit 9 generates two control signals j1, j2 of before and after, sends them out to a hist-memory 7, and an address immediately before the address whose instruction has been executed by j1, and an address whose instruction is executed by j2 are inputted from a register 6, and stored in the memory 7. By repeating such operation, the head addaess of each module whose instruction is executed, and the set address of a call instruction are stored in the time series.


Inventors:
TAKAGI HARUO
TAKAHASHI YOSHINORI
Application Number:
JP11863483A
Publication Date:
January 17, 1985
Filing Date:
June 29, 1983
Export Citation:
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Assignee:
OMRON TATEISI ELECTRONICS CO
International Classes:
G06F11/28; G06F11/36; (IPC1-7): G06F11/28
Attorney, Agent or Firm:
Suzuki Yoshimitsu