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Title:
MEMORY PROTECTION CIRCUIT
Document Type and Number:
Japanese Patent JPS5845699
Kind Code:
A
Abstract:

PURPOSE: To prevent the destruction of content of storage in a memory protection area at a failure, by providing a means which can designate the memory protection area in the hardware, by means of jumpers.

CONSTITUTION: In designating a memory protection area with a software instruction so that the content of a storage device can not be destructed, parts shown in broken lines (b) of a jumper set circuit 9 are jumpered. In fixing the hardware, parts as shown in a broken line (a) of the circuit 9 and a broken line (c) for the output of an access area selection circuit 8 for the area to be memory-protected, are jumpered. That is, an output of a memory address comparison circuit 2 set with the software instruction is inactivated as the broken line (a) of the circuit 9 and an arbitrary protection area is jumpered with one or a plurality of designations for the broken line (c) of the circuit 9.


Inventors:
TAKAYAMA AKIRA
KOIKE HIDEYUKI
Application Number:
JP14101381A
Publication Date:
March 16, 1983
Filing Date:
September 09, 1981
Export Citation:
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Assignee:
HITACHI LTD
NIPPON TELEGRAPH & TELEPHONE
International Classes:
G06F12/14; G06F21/60; G11C29/00; (IPC1-7): G11C29/00
Attorney, Agent or Firm:
Katsuo Ogawa



 
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