Title:
INTERPOLATING ARITHMETIC CIRCUIT
Document Type and Number:
Japanese Patent JPS5981763
Kind Code:
A
Abstract:
PURPOSE:To simplify the constitution of an arithmetic part and the addressing of a memory storing the numerical value obtained after an interpolating operation by changing the output of an address counter by a multiplexer in accordance with the read/write switching signal. CONSTITUTION:The numerical value within a memory (RAM1) 14 is interpolated to obtain the contents of a memory (RAM2) 18. For lower three lines of an address counter 20 of the memory 18, the contents of the counter 20 are applied as they are to the memory 18 by a multiplexer 22 if an input part A is selected. If an input part B is selected, the contents of the counter 20 are converted and applied to the memory 18 for the lower three lines of the counter 20. The selection is performed between the part A or B with an input of a read/write (R/W), switching signal. In an interpolation mode, the write (W) signal is supplied to select the part B.
Inventors:
SUZUKI SATORU
Application Number:
JP19109282A
Publication Date:
May 11, 1984
Filing Date:
October 30, 1982
Export Citation:
Assignee:
SHIMADZU CORP
International Classes:
G06T1/20; G06F17/17; (IPC1-7): G06F15/353
Attorney, Agent or Firm:
Sadao Ikeda