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Title:
FREQUENCY DIVIDER
Document Type and Number:
Japanese Patent JPS60113526
Kind Code:
A
Abstract:

PURPOSE: To obtain a frequency divider with setting in a simple constitution where just a single transistor is added to a dynamic frequency divider, by permitting a setting action only with the specific timing.

CONSTITUTION: A transistor TR102 is connected among a dynamic 1/2 frequency divider consisting of TR1∼10, a terminal VC13 and a low level. Then a set signal is applied to the gate of the TR102. When a set terminal 105 is set at a low level, the TR102 is turned off and functions as a normal dynamic frequency divider. A set signal is produced synchronously with the rise of a clock CL. Then the TR102 is turned on when the terminal 105 is set at a high level, and the terminal VC13 is fircibly set at a low level. Thus a terminal VA11 is set at a high level.


Inventors:
YAMADA ICHIROU
Application Number:
JP22092283A
Publication Date:
June 20, 1985
Filing Date:
November 24, 1983
Export Citation:
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Assignee:
SUWA SEIKOSHA KK
International Classes:
H03K23/54; H03K3/356; (IPC1-7): H03K23/44; H03K23/60
Attorney, Agent or Firm:
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