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Title:
CODE CONVERTING SYSTEM OF MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS60138656
Kind Code:
A
Abstract:

PURPOSE: To improve the countermeasure to a fault and the adaptability of program constitution by providing a code converting memory to convert a code into another one on the way to the data and programs are transferred to a CPU from a main memory.

CONSTITUTION: When data and programs are transferred to a CPU3 from a main memory 1, a code converting memory 5 different in constitution from the main memory 1 and can allocate optionally address space is provided, then the code conversion data is stored in it. As a result, the output data DA0WDA15 of the memory 1 and output data DB0WDB15 of the memory 5 are applied with the code conversion via an exclusive OR circuit 13, and an NOT circuit 14 when it is accessed from the CPU3, then the result is outputted to the CPU3. Thus even an address space of a ROM of the memory 1 can be easily converted into other data. As a result, it is possible to improve the countermeasure to bit/word fault, and the adaptability of the multiplex constitution of a program.


Inventors:
NAKAGAWA NOBUO
Application Number:
JP24595483A
Publication Date:
July 23, 1985
Filing Date:
December 27, 1983
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F5/00; G06F12/06; G06F12/16; (IPC1-7): G06F5/00; G06F12/00
Domestic Patent References:
JPS5458316A1979-05-11
JPS5457144A1979-05-08
JPS5657144A1981-05-19
Attorney, Agent or Firm:
Mamoru Takada (1 person outside)



 
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