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Title:
CONTROL SYSTEM FOR INSTRUCTION EXECUTION
Document Type and Number:
Japanese Patent JPS60116038
Kind Code:
A
Abstract:

PURPOSE: To improve a processing speed by executing rapidly a corresponding instruction unless the instruction following a mask control instruction is a mask control instruction.

CONSTITUTION: When the instruction following a mask control instruction is not a mask control instruction, an instruction control part 2 sends a signal REIFCH in the state A of a mask control instruction by using a microprogram once the mask control instruction is sent through a pipeline, holds the signal REIFCH in a flip-flop in the state W, and cancels all active states of a central processor in the state of an RS11D23 to perform REIFCH operation. Simultaneously, a specific value is set in a counter 5, which starts counting down. When the state of the RE11D23 is completed, a state PROCESS is entered with a start signal, and the next instruction is executed. If there is an I/O interruption request from a channel processor 8 while the counter 5 counts down to zero, a pipeline control part 4 clears the pipeline and a process control part 3 performs I/O interruption processing.


Inventors:
MATSUNOSHITA FUMIO
MIZUSHIMA YOSHIHIRO
Application Number:
JP22468283A
Publication Date:
June 22, 1985
Filing Date:
November 29, 1983
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F9/38; G06F9/32; G06F9/48; G06F13/24; (IPC1-7): G06F9/32; G06F9/38
Attorney, Agent or Firm:
Kyotani Shiro



 
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