Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5934638
Kind Code:
A
Abstract:
PURPOSE:To improve dielectric resistance largely while preventing an effect by an external electric field by using laminating structure in which the surface of a semiconductor substrate is coated with a polycrystalline silicon layer as a protective film and a polycrystalline silicon layer containing oxygen is formed on the silicon layer. CONSTITUTION:Openings are formed to a collector-base junction section and the base region section and collector region section of the surface of the semiconductor substrate 1 to which a depletion layer reaches when reverse bias voltage is applied to a collector-base junction, and the polycrystalline silicon film layer 5, the polycrystalline silicon film layer 6 containing oxygen and an insulating film layer 7, such as a silicon nitride film, a silicon dioxide film, etc. are formed through a vapor growth method. Fixed charges are hardly induced or moving charges hardly have an effect as seen in a silicon dioxide film layer because the resistivity of polycrystalline silicon is smaller than that of the silicon dioxide film. The layer 6 is formed because leakage currents in the case when reverse bias is applied to the collector-base junction are large only in the layer 5, and leakage currents are inhibited to a small value. The layer 7 prevents the breakdown of the layer 6 and a pollution from the outside.
Inventors:
KASASHIMA TERUYUKI
KAWASAKI HIDEO
SUGUMOTO SUSUMU
KAWASAKI HIDEO
SUGUMOTO SUSUMU
Application Number:
JP14495982A
Publication Date:
February 25, 1984
Filing Date:
August 20, 1982
Export Citation:
Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L29/73; H01L21/314; H01L21/331; (IPC1-7): H01L29/06
Attorney, Agent or Firm:
Toshio Nakao