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Patent Searching and Data


Title:
LOGICAL CIRCUIT
Document Type and Number:
Japanese Patent JPS6011926
Kind Code:
A
Abstract:

PURPOSE: To constitute a high-speed logical circuit with a small number of transistors by providing five units of a differential pair of two transistors having emitters connected to each other and connecting a current source to the common emitter of the 1st differential pair.

CONSTITUTION: Each of the 1stW5th differential pairs consists of two transistors TR having emitters connected to each other, and a current source is connected to the common emitter of the 1st differential pair. For example, a constant current source is provided with TRQ15 and Q16 and their emitter resistances R3 and R4, and a bias voltage source VB4. The collector of the TRQ15 is connected to a common emitter of a differential pair of TRQ1, and at the same time the collectors of the TRQ1 and Q2 are connected to the common emitters of a differential pair of TRQ3 and Q4 as well as a differential pair of TRQ5 and Q6. Then an input signal SG2 is applied to the bases of the TRQ3 and Q5, and the collector of TRQ3 is connected to a common emitter of the TRQ7 and Q8.


Inventors:
HASEGAWA KENICHI
YAMADA KIYOYASU
MORI TOSHIKI
AONO KUNITOSHI
Application Number:
JP12053183A
Publication Date:
January 22, 1985
Filing Date:
July 01, 1983
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F7/501; G06F7/50; (IPC1-7): G06F7/50
Attorney, Agent or Firm:
Toshio Nakao