PURPOSE: To simplify the control and to improve the performance of a storage control system by controlling te updating of a change bit of the 1st holding means in response to the value of the replaced bit held by the 2nd holding means in accordance with the writing operation to a memory device.
CONSTITUTION: When a write request is delivered to a memory device, the output of an AND gate 116 is set at "1" as long as the C bit (change bit) is "0". Then the C bit within a TLB101 is updated to "1" via an OR gate 118 and a line 123. This shows the writing has been done to the corresponding block. The output of the gate 118 is applied also to an OR gate 119, and the R bit (reference bit) is also updated to "L" via a line 122 to show that the corresponding block has been referred to. In such a way, both R and C bits are updated just once with the first request respectively for each block, and no subsequent updated is done after the updating is carried out once. This prevents the deterioration of processing performance of a storage controller due to the updating of both R and C bits.
KISHI MAKOTO
YANAGIDA TOMOATSU
KUBO KANJI
