PURPOSE: To alway attain stable clock detection with a simple system by taking exclusive OR between an input signal subject to changing point detection signal biphase coding where the binary state is inverted alternately at the point of time of code change and the output of a flip-flop.

CONSTITUTION: A code change detection circuit 701 detects the code change of 1→0 of the input signal 702. A code change detection circuit 703 detects the code change of 0→1 of the input signal 702. A set/reset flip-flop 706 uses one output signal of code change detection circuits 701, 703 as the set input signal and the other output signal as a reset input signal. An exclusive OR circuit inputs the output signal 707 of the flip-flop 706 and the input signal subject to biphase coding so as to OR them exclusively.