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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS59182628
Kind Code:
A
Abstract:

PURPOSE: To attain efficiently the checking or repair of individual semiconductor integrated circuit device by applying an output state control signal to each output circuit from an external terminal via an input buffer circuit.

CONSTITUTION: A signal formed by a logical block constituted with an emitter coupling logical ECL gate array is outputted from an output terminal OUT1 through an output circuit OB1. Further, the output state control signal is applied to a device from the external terminal C newly, and this signal is applied in common to output circuits OB1∼OBn through an input buffer circuit CB. In bringing the terminal C to a high potential, the control signal is brought into a high potential, TRs Q5, Q6 are turned on by receiving it and a TRQ7 is turned on. Thus, the output TRQ4 is turned off forcibly. Thus, the output TRQ4 of the output circuits OB1∼OBn is turned off simultaneously.


Inventors:
YOSHIDA SUKEHIRO
TANAKA TSUNEO
KOBAYASHI TOORU
Application Number:
JP5513383A
Publication Date:
October 17, 1984
Filing Date:
April 01, 1983
Export Citation:
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Assignee:
HITACHI COMPUTER ENG
HITACHI LTD
International Classes:
H03K19/086; (IPC1-7): H01L21/84
Attorney, Agent or Firm:
Akio Takahashi



 
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