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Title:
BINARY PROCESSING CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS5850077
Kind Code:
A
Abstract:

PURPOSE: To make information binary most suitably in a high speed even if respective lines of a form have different formats, by using two binary system indication table each of which binary system indication information corresponding to one-character line components can be stored in.

CONSTITUTION: The picture signal obtained by scanning of the surface of a form 1 due to a CCD line scanner 2 is stored temporarily in a picture memory 4. For example, character lines 10aW10d have different formats as shown in a form 1, a CPU 13 writes binary system indication informationIfor the character line 10a in a table 7A and writes binary system indication information II for the character line 10b in a table 7B. While information II of the table 7B is referred to, the CPU 13 writes information III for the character line 10c in the table 7A. After writing indication information in this manner, the CPU 13 reads out indication information corresponding to the next line from the other table synchronously with the timing of the read of information of the next line from the memory 4 and makes information from the memory 4 in a binary circuit 5.


Inventors:
TAKAHASHI SHIYOUJI
TAKAHASHI TAKESHI
KANEMITSU NORIO
Application Number:
JP14815381A
Publication Date:
March 24, 1983
Filing Date:
September 19, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06K7/00; G06V30/162; G06V30/10; (IPC1-7): G06K7/10
Attorney, Agent or Firm:
Minoru Aoyagi



 
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