PURPOSE: To decrease the output bits independent of each other and to reduce switching noises by reducing a time change down to a low level in a switching mode of output signal for a current flowing to a lead inductance at the side of a high potential power supply which is supplied to an output transistor (TR) with no use of an output pin.
CONSTITUTION: A logical circuit is provided with a current switch CS and two output TRs Q5 and Q5'. The output at the NOR side of the switch CS is delivered to the outside of a chip by means of the TRQ5, and the output at the OR side of the CS is terminated within the chip via the TRQ5'. The NOR outputs and the OR outputs of signals I1 and I3 supplied to the CS are delivered through a TRQN and a TRQP to drive the TRs Q5 and Q5'. A high potential power supply is given to the collectors of the TRs Q5 and Q5' via a lead inductance Lc. Then a time change of the current flowing to the Lc is reduced down to a low level in a switching mode of an output signal. In this way the output bits which are independent of each other are decreased and the switching noises are reduced.
KAWASHIMA SEIICHI
FUJITA BUNICHI
