PURPOSE: To reduce loss in low speed, high load state by providing a zone having a time length corresponding to the amplitude of an output current in a zero vector output zone, and generating a value vector immediately before the output zone in a zone corresponding to the output current.

CONSTITUTION: An AND gate 21 interrupts a zero vector instruction output of a second comparator 16. A low level zone (value vector zone) is preserved as it is, but a high level zone (zero vector output zone) is not preserved as it is, but interrupted. The value vector immediately before is continuously output during the interrupting zone. The time length T of the interrupting zone is proportional to the amplitude of the output current of an inverter 2. In order to generate the interrupting zone in synchronization with the zero vector output zone, a phase inverted triangular voltage of the triangular voltage used in comparison of the comparator 15 is formed by an inverting amplifier 29 having a gain A, and input to a third comparator 28. On the other hand, the output current of the inverter 2 is amplified by an amplifier 27, and input as a current detection signal to the comparator 28.