PURPOSE: To obtain a signal superimposed on an input terminal voltage of an ultrasonic wave delay line, reflected at an output terminal and delayed by double by subtracting a voltage corresponding to an input signal voltage from a voltage at the input terminal voltage of the ultrasonic wave delay line.
CONSTITUTION: A signal voltage E1 at input terminals 16, 16' is a superimposed voltage of a signal voltage delayed by a time twice the one-way delay time of a delay line 8 and a voltage E0 at a signal input terminal, because the E1 is reflected at an output terminal of the ultrasonic wave delay line 8 and returned again. A signal voltage multiplying the voltage E0 at the input terminal by α is subtracted from a signal voltage multiplying the signal voltage E1 by β at a subtractor 12. The term of the input signal voltage is eliminated from the superimposed voltage and only the reflected wave signal voltage is extracted by selecting the value α as α=β×Zi/(Z+Zi), where Zi is an input impedance of the ultrasonic wave delay line and Z is an impedace 9.
HAYAKAWA DAISHIROU
NARITA KATSUMI
