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Title:
SEMICONDUCTOR NONVOLATILE MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS58196054
Kind Code:
A
Abstract:

PURPOSE: To contrive the improvement of information maintenance and write- erasure performance by a method wherein the charge accumulation part using an SiO2 film and an Si3N4 film and the charge accumulation part using a floating gate are provided on a channel region, and these are used as a memory.

CONSTITUTION: The Si3N4 film 6 and the floating gate 9 are formed between a drain 2 and a source 3 via the tunnel SiO2 film 7, and a control gate electrode 8 is formed above it via the SiO2 film 4. There are two ways to perform write into this element: one is the method wherein electrons are trapped in the neighborhood of the boundary surface between the SiO2 film 7 and the Si3N4 film 6 by impressing a voltage between the electrode 8 and a substrate 1, and the other is the method wherein the floating gate 9 is electrified by impressing a positive voltage on the gate electrode 8 and the drain 2. When charges exist between the SiO2 film 7 and the Si3N4 film 6, erasure is performed by impressing a positive voltage on the substrate 1 and earthing the electrode 8. On the other hand, when the charges exist in the gate 9, it is performed by irradiating ultraviolet rays 10. Readout is performed by detecting the variation of the amount of current between the drain 2 and the source 3.


Inventors:
MATSUO RIYUUICHI
Application Number:
JP8048182A
Publication Date:
November 15, 1983
Filing Date:
May 11, 1982
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L27/112; H01L21/8246; H01L21/8247; H01L29/788; H01L29/792; (IPC1-7): G11C11/40; H01L27/10
Attorney, Agent or Firm:
Shinichi Kusano



 
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