PURPOSE: To selectively fetch optional contents from a queuing register, by providing an enqueue logical circuit in accordance with each stage of a shift register, and executing a write operation by this circuit.

CONSTITUTION: When a signal line 21 is set to logic "1" among signal lines 19W 23, an NOR circuit becomes logic "0", also FFs 63, 64, in a shift register rewrite the self-contents through an AND circuit 60, FFs 71, 72 rewrite the self-contents through an AND circuit, contents of a lower stage are written in FFs 79, 80 through an AND circuit 77, contents of the lower stage are written in FFs 87, 88 through an AND circuit 85, and "0" is written in FFs 94, 95. In that case, the contents of the FFS 79, 80 are outputted through a signal line 16. In this way, contents of an optional stage can be dequeued selectively.