PURPOSE: To remove charges induced in the part of a MIS type transistor in an ROM by conventional annealing by a method wherein the adjacent parts of gate oxide films are formed to a thick oxide film having approx. the thickness of a field oxide film.
CONSTITUTION: An N+ diffused region 3 and N+ diffused regions 41∼44 serving as the source and drain of an MNOS type transistor are formed in a P- well 2. On the surface of the well, gate oxide films 61∼63 are formed by adjacency in the gate region of the MIS type transistor, and thick oxide films 10 of the same thickness as that of the field oxide film 5 are formed at the adjacent parts between these oxide films 61∼63. An SiN film 7 is formed on the films 5 and 6, and an electrode wiring metal 8 is formed theron in a required pattern. Such a construction facilitates hydrogen diffusion in the presence of the films 10.
WO/2024/011664 | SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD |
JPH05114606 | INSULATED-GATE BIPOLAR TRANSISTOR |
JP2007201054 | JOINT CONSTRUCTION AND ITS PROCESS FOR FABRICATION |
Next Patent: JPS6098675