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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE EQUIPPED WITH STATIC BREAKDOWN PREVENTING ELEMENT
Document Type and Number:
Japanese Patent JPS59175152
Kind Code:
A
Abstract:

PURPOSE: To realize the effective prevention of static breakdown against surge by a method wherein the titled element formed by a P-N-P-N structure is formed in a semiconductor substrate and then connected between a power source terminal and an input terminal.

CONSTITUTION: The titled element 20 is connected to an input N-P-N transistor 30 in an integrated circuit to be protected. When a positive surge is impressed, the base-collector junction and the base-emitter junction of said transistor 30 become forward directional, resulting in the difficulty in breakdown. When a negative surge is impressed, the peak of the surge is impressed on the anode and cathode of said element 20. Said element 20 turns on by means of the large voltage at the beginning of surge impression by modulating the current amplification factor, thus discharging the surge steeply.


Inventors:
TACHIKI MAKOTO
Application Number:
JP4973683A
Publication Date:
October 03, 1984
Filing Date:
March 23, 1983
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L27/04; H01L21/822; H01L27/02; H01L27/06; (IPC1-7): H01L27/04; H01L27/08; H01L29/74
Attorney, Agent or Firm:
Masuo Oiwa



 
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