PURPOSE: To increase both the action margin and speed with a semiconductor memory by connecting an enhancement type MOSFET and a depression type MOSFET in parallel to obtain the load of an amplifying MOSFET.
CONSTITUTION: A memory array M-ARY consists of MOSFETQ1WQ6, word lines W1 and W2 and data lines D1WDn. A common data line CD which receives a write signal forms an input circuit of a sense amplifier and is connected to the source of an amplifying MOSFETQ15. At the same time, the potential given from a dummy MOSFET is supplied to the source of an amplifying MOSFET21 via a Q18. A parallel circuit of an enhancement type MOSFETQ14 having its gate and drain connected in common and a depression type MOSFETQ13 having its gate and source connected in common is used for the load of the Q15 and Q21 respectively. The Q15 amplifies a gate earth type source input and this output of amplification is supplied to a differential amplifying circuit A.
FURUSAWA KAZUNORI
MUTOU TADASHI
WATANABE TAKASHI
HITACHI MICROCUMPUTER ENG