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Patent Searching and Data


Title:
ERROR REPORTING SYSTEM
Document Type and Number:
Japanese Patent JPS5864556
Kind Code:
A
Abstract:

PURPOSE: To report correct fault contents to a host device, and to shorten the recovery time of a fault controller, by setting up a bus between respective controllers through a microprocessor, and analyzing and editing the fault contents through the processor.

CONSTITUTION: Controllers 3 and 33 are connected to the CPU1 of a file sub- system through channels 2 and 22 respectively, and a microprocessor 6 is connected as an interface between both devices 3 and 33. The processor 6 sets up a bus for the interface to analyze and edit fault contents of the controllers 3 and 33, and report correct fault contents to the CPU1 through the channels 2 and 22. As well as this fault reporting, a substitute bus for the operating system OR of the faulty controller 3 or 33 is set up to shorten fault recovery time, thereby improving the reliability of the system.


Inventors:
SEKI KAZUHISA
Application Number:
JP16304681A
Publication Date:
April 16, 1983
Filing Date:
October 13, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/30; G06F11/00; (IPC1-7): G06F11/30
Attorney, Agent or Firm:
Koshiro Matsuoka