PURPOSE: To increase effectively a memory access speed by providing a comparing circuit for comparing a step-advanced address driven by a step-advancing circuit and a read-out address to which an original access is to be executed in the next time, and a driver.

CONSTITUTION: In case of a read-out access, when a processor generates a read- out access command to an address A, an address (A+1) is set to an address register 3 through a step-advancing circuit 4 in a memory device. Subsequently, basing on it, a read-out access is executed as the address (A+1) autonomously to a memory 2, and its result is set to a read-out data register 6. Next, when the processor generates a read-out access command to the address (A+1), the memory device side collates the contents of the register 3 with the address (A+1) by a comparing circuit 8. In case they coincide with each other, a control part 1 executes a control so as to transfer the contents of the register 6 by a driver 7. In this way, a processing speed can be increased by transferring directly the contents of the register 6.