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Patent Searching and Data


Title:
INPUT AND OUTPUT PROCESSOR
Document Type and Number:
Japanese Patent JPS6027970
Kind Code:
A
Abstract:

PURPOSE: To improve input/output (I/O) processing performance when an input/ output interruption request is accepted from a peripheral equipment which has a different speed by varying a sequence after the acceptance of the I/O interruption request according to respective channel ports.

CONSTITUTION: An I/O 1 consists of an I/O control part 2 and three I/O channel ports 3. Signals indicating the channel number of the channel ports 3, received by the accepting circuit 20 of a control part 2, varies in value according to the channel number. Consequently, when a port having a short control sequence is accepted after a port having a control sequence extending between two clocks is accepted by interruption, sequence operation is delayed by two clocks. Thus, and overlap of control sequences is avoided. Namely, the I/O processing performance when an interruption request from a peripheral equipment having a different speed is accepted is improved.


Inventors:
TANAKA YASUHARU
Application Number:
JP13835183A
Publication Date:
February 13, 1985
Filing Date:
July 27, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F13/42; G06F13/24; (IPC1-7): G06F13/12
Attorney, Agent or Firm:
Yutaro Kumagai