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Title:
ELECTROSTATIC INDUCTION TRANSISTOR
Document Type and Number:
Japanese Patent JPS5929468
Kind Code:
A
Abstract:

PURPOSE: To form the electrostatic transistor having no possiblity of deterioation in withstand voltage between the source and the gate of the titled transistor by a method wherein an auxiliary region of the same conduction type, width and diffusion depth as the gate region is provided between a broad gate region and the source region adjoining to the broad gate region.

CONSTITUTION: As the width and diffusion depth of a p+ type auxiliary gate region 3c and the width and diffusion region of a p+ type gate region 3a are identical, and the interval between the p+ type auxiliary gate region 3c and an n+ type source region 4 adjoining the region 3c is same as that between the p+ type gate region 3a and the n+ type source region 4, the length of diffusion in transverse direction of these regions 3a, 3c and 4 are short and almost uniform, thereby enabling to prevent lowering of withstand voltage between the source and the gate. Also, even when a part having long transverse diffusion length is generated on a p+ type broad gate region 3b, the interval between the p+ type auxiliary gate region 3c and the n+ type source region adjoining to the region 3c is unchanged, and there is no possiblity of lowering the withstand voltage between the source and the gate.


Inventors:
HIBINO MITSUTOSHI
Application Number:
JP14086582A
Publication Date:
February 16, 1984
Filing Date:
August 11, 1982
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L29/80; H01L29/10; (IPC1-7): H01L29/80
Domestic Patent References:
JPS5067085A1975-06-05
JPS51129184A1976-11-10
JPS5487488A1979-07-11
Attorney, Agent or Firm:
Masuo Oiwa