PURPOSE: To form the electrostatic transistor having no possiblity of deterioation in withstand voltage between the source and the gate of the titled transistor by a method wherein an auxiliary region of the same conduction type, width and diffusion depth as the gate region is provided between a broad gate region and the source region adjoining to the broad gate region.
CONSTITUTION: As the width and diffusion depth of a p+ type auxiliary gate region 3c and the width and diffusion region of a p+ type gate region 3a are identical, and the interval between the p+ type auxiliary gate region 3c and an n+ type source region 4 adjoining the region 3c is same as that between the p+ type gate region 3a and the n+ type source region 4, the length of diffusion in transverse direction of these regions 3a, 3c and 4 are short and almost uniform, thereby enabling to prevent lowering of withstand voltage between the source and the gate. Also, even when a part having long transverse diffusion length is generated on a p+ type broad gate region 3b, the interval between the p+ type auxiliary gate region 3c and the n+ type source region adjoining to the region 3c is unchanged, and there is no possiblity of lowering the withstand voltage between the source and the gate.
JPS5067085A | 1975-06-05 | |||
JPS51129184A | 1976-11-10 | |||
JPS5487488A | 1979-07-11 |