PURPOSE: To simplify the circuit by discriminating whether a received test pattern is 0 or 1 after a delay time corresponding to duty ratio 1 from the leading edge of a test pattern 1 received by a test signal.

CONSTITUTION: A transceiver cable test circuit 1 of 'Ethernet(R)' has a connector 1a and a terminal 1b and a test signal generating means consists of a 20MHz oscillator 2 and a binary counter 3. A logic discrimination means consists of a monostable multivibrator circuit 9 and a D flip-flop 10. When the polarity of the received test pattern is inverted due to mis-connection, the monostable multivibrator 9 is operated with a delay time τ from the leading point of time of the test pattern whose polarity is inverted and generates a pulse restored after 50nS. Thus, the terminal D of the D flip-flop is at H level at a terminal Q of the monostable multivibrator 9, then an error output is produced from the terminal 1b.