Title:
TRANSISTOR AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JP3160525
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To suppress the generation of a mutual modulated product overlapped with the frequency band of a received signal by providing a parallel resonance circuit to be resonated at any specified frequency band at either the emitter or the collector of a transistor amplifier circuit at least.
SOLUTION: A parallel resonance circuit 2 is serially connected to the side of an emitter 1e of a transistor 1, and the parallel resonance circuit 2 is set to be resonated at the double frequency band of the frequency band of basic wave of a signal to be amplified by this amplifier circuit. Concerning the parallel resonance circuit composed of a capacitance C1 and an inductance L1, its impedance is made maximum at the resonance frequency. Therefore, by adjusting the inductance L1 and the capacitance C1 so as to resonate it at the frequency of a desired signal to be attenuated, the signal at that frequency can be attenuated. Concerning a signal at a frequency separated from the resonance frequency, on the other hand, its impedance is small incomparison with a basic frequency and is not almost attenuated. Therefore, no noise is mixed into a received signal band and no received signal is canceled.
Inventors:
Kazusuke Yanagisawa
Ryo Horie
Engineering Yano
Ryo Horie
Engineering Yano
Application Number:
JP7029796A
Publication Date:
April 25, 2001
Filing Date:
March 26, 1996
Export Citation:
Assignee:
Yokoo Co., Ltd.
International Classes:
H03F3/189; H03F1/26; H03F3/19; (IPC1-7): H03F3/19; H03F1/26
Domestic Patent References:
| JP5191176A | ||||
| JP49114836U | ||||
| JP5572324U | ||||
| JP452427B1 |
Attorney, Agent or Firm:
Kawamura