To provide an inexpensive interleave system capable of realizing an effectively high access speed even in the case of storage elements with a slow access speed or when interleaving for a long time is required.
In an interleave processing circuit rearranging sequence of information codes of a transmission apparatus for transmitting an information code subjected to interleaving processing, n-sets (n is an integer of 2 or over) of consecutive information codes are alternately distributed to a plurality of interleave processing storage elements, wherein the processing is executed in parallel. Further, a frame is configured with m-sets (m is an integer of 2 or over) of consecutive information codes and access to each storage element is completed within the frame, and a random access for access to the storage elements to disperse the information codes and a burst access for sequential access are processed in time division in the frame.
SAKATA MASASHI