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Patent Searching and Data


Title:
TRANSMISSION FRAME COUNTER
Document Type and Number:
Japanese Patent JPS5757052
Kind Code:
A
Abstract:

PURPOSE: To prevent the variance of the length of a trasnsmission traffic burst, by changing contents of a transmission frame counter by a counter control signal determined by a maximum phase error and phase error data.

CONSTITUTION: When a transmission traffic burst exists in a normal allocated position, phase error data 20 is zero, and a counter holding signal genertor 28 generates a counter holding signal 34 by a maximum phase error. Contents of a transmission frame counter 21 are held by the holding signal 34. When the transmission traffic burst exists in a position later than the normal allocated position, phase error data 20 corresponds to this lag, and the counter holding signal generator 28 generates the counter holding signal by the result obtained by subtracting phase error data 20 from the maximum phase error.


Inventors:
SHIBA HIDEO
Application Number:
JP13249580A
Publication Date:
April 06, 1982
Filing Date:
September 23, 1980
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H04J3/00; H04B7/212; H04J3/06; (IPC1-7): H04J3/00; H04J3/06