PURPOSE: To execute error detection with high accuracy by using not only a parity bit for showing its parity with regard to the number of pieces of '1' or '0' of an information bit contained in its section, as a monitoring bit, but also a piece number bit whose value has been determined in advance in accordance with its number of pieces.

CONSTITUTION: At a transmission side, an information bit is divided by a prescribed bit number, and in order to monitor the information bits contained in its section, a monitoring bit is added to these information bits and they are sent out to a transmission line 5. At a reception side, the information bit and the monitoring bit which have been received are compared and a code error in the transmission line 5 is detected. In this case, as its monitoring bit, a parity bit for showing its parity with regard to the number of pieces of '1' and '0' of the information bit contained in its section is used. Also, as the monitoring bit, not only the parity bit, but also a piece number bit whose value has been determined in advance in accordance with the number of pieces of the information bit are used. In such a way, the accuracy error detection can be raised.