To provide a traveling wave amplifier that reduces jitter in an output signal.
A traveling wave amplifier 10 has two or more differential amplification circuits 12a, 12b, 12c, whose input terminals are connected to delay lines Lin1, Lin2 for receiving input signals with different delay times and whose output terminals are connected to delay lines Lout1, Lout2 for outputting output signals with different delay times. In the traveling wave amplifier, the differential amplification circuits 12a, 12b, 12c each have differential pair transistors Tr3, Tr4, a pair of cascode transistors Tr5, Tr6 connected in series with the differential pair transistors Tr3, Tr4, respectively, and current sources I5, I6 for supplying currents to current terminals of the pair of cascode transistors Tr5, Tr6 irrespective of switching states of the differential pair transistors Tr3, Tr4.
TANAKA KEIJI
SAWADA SOSAKU
JP2001160744A | 2001-06-12 | |||
JP2010272918A | 2010-12-02 | |||
JP2008295093A | 2008-12-04 | |||
JP2007193623A | 2007-08-02 |
US20050248407A1 | 2005-11-10 |
Yoshiki Kuroki
Ichira Kondo
Yuji Suwa
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