Title:
TRIGGER CIRCUIT AND TRIGGER SIGNAL GENERATING METHOD
Document Type and Number:
Japanese Patent JP2010166560
Kind Code:
A
Abstract:
To generate a trigger signal from a differential signal at high bandwidth and with low jitter.
The differential signal from a differential signal source 201 is applied to a non-inverted input terminal and an inverted input terminal of a comparator 211 via resistance attenuators 219 and 220. Differential threshold voltage levels from voltage sources 203 and 204 are applied to the non-inverted input terminal and the inverted input terminal of the comparator 211 via termination resistors 207 and 208. When voltages at the non-inverted input terminal and the inverted input terminal cross each other, the comparator 211 generates a trigger signal form a trigger output terminal 214.
COPYRIGHT: (C)2010,JPO&INPIT
More Like This:
WO/1993/013599 | INTEGRATOR HAVING SWITCHED HYSTERESIS FOR PROXIMITY SWITCHES |
JPS62117175 | DROP-OUT DETECTION CIRCUIT |
Inventors:
MARKOZEN GENE L
HICKMAN BARTON T
HICKMAN BARTON T
Application Number:
JP2010001548A
Publication Date:
July 29, 2010
Filing Date:
January 06, 2010
Export Citation:
Assignee:
TEKTRONIX INC
International Classes:
H03K5/153; G01R13/20; H03K5/08; H03K19/0175
Domestic Patent References:
JPH03187647A | 1991-08-15 | |||
JPS604036U | 1985-01-12 | |||
JPH0634666A | 1994-02-10 | |||
JPH0854418A | 1996-02-27 |
Other References:
JPN6013000188; 猪飼國夫著: 「インターフェース回路の設計」 第2版, 19810620, 67頁、162頁, CQ出版株式会社
Attorney, Agent or Firm:
Kunio Yamaguchi
Takashi Yamaguchi
Takashi Yamaguchi