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Title:
TRIGGER CIRCUIT
Document Type and Number:
Japanese Patent JPS59119269
Kind Code:
A
Abstract:

PURPOSE: To detect abnormality speedily and to improve the efficiency of a circuit test and trouble cause investigation by generating a trigger signal when a pattern other than the pattern of a signal expected to be generated in a normal state is generated.

CONSTITUTION: When an observer sets the bit pattern of a signal which is generated originally in a setting part 1, this signal pattern is set in latch memories 2-1W2-N. Then, if a pattern other than said bit pattern is generated on signal flux to be measured at some sampling timing and stored in an input buffer 4, outputs M1WMn of comparators 3-1W3-N all attain to a level L. Consequently, the output UM of an inverted AND gate 8 attain to a level H and when this signal UM is set in a flip-flop 7 by a sampling signal, a trigger signal TRG is generated.


Inventors:
TAKAI JIYUNICHI
Application Number:
JP22821882A
Publication Date:
July 10, 1984
Filing Date:
December 27, 1982
Export Citation:
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Assignee:
MEIDENSHA ELECTRIC MFG CO LTD
International Classes:
G01R13/28; G01R13/20; G01R13/32; H03K5/153; H03K5/19; (IPC1-7): G01R13/32; H03K5/153
Attorney, Agent or Firm:
Fujiya Shiga



 
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