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Patent Searching and Data


Title:
TRIMMING METHOD FOR REACTANCE
Document Type and Number:
Japanese Patent JPS5871647
Kind Code:
A
Abstract:

PURPOSE: To enable to adjust the value of a reactance so as to obtain the reactance of large capacity and to become optimum circuit constant even if the resistance of conductors varies in response to the cutting width of the surface of the conductor by cutting the conductor with a laser light when the reactance is formed in a hybrid integrated circuit.

CONSTITUTION: When a reactance is formed on the insulating substrate of a hybrid integrated circuit 10 having a resistor 2, a semiconductor chip 3 and a conductor pattern 4 on the substrate, the overall surface is first printed by a conductor printing technique on the part A formed with the reactance, a through hole 6 is formed at the center, and a terminal is led externally. A laser 20 is disposed on the surface A of the conductor to set it to emit a laser light. The laser light is focused in this state, and the laser 10 is moved to cut the surface A of the conductor in a ring shape with the laser light. The value of the reactance 11 increases as the conductor is cut. In case that the laser 20 is deenergized when it becomes optimum for the operation of the circuit 10, the reactance 11 of the optimum circuit constants can be obtained.


Inventors:
YOSHIMURA KIYOKAZU
AOI TATSUO
Application Number:
JP17031581A
Publication Date:
April 28, 1983
Filing Date:
October 23, 1981
Export Citation:
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Assignee:
OMRON TATEISI ELECTRONICS CO
International Classes:
H05K1/16; H01F17/00; H01F41/04; H01L27/01; (IPC1-7): H01F15/00; H01F41/06; H05K1/16