Title:
TROUBLE DETECTING CIRCUIT FOR CONTROLLER
Document Type and Number:
Japanese Patent JPS62267806
Kind Code:
A
Abstract:
PURPOSE:To take a quick and proper measure against a trouble and to prevent the influence of the trouble by using such a circuit that decides a trouble of a comparator or an arithmetic controller after detecting that the control signal outputted from the arithmetic controller is kept at a level outside a prescribed range for a fixed period of time. CONSTITUTION:When the control signal supplied to an arithmetic controller abnormality detecting circuit 20 is kept at a level higher than that prescribed by a comparator 21 for a period of time longer than that set by a timer 22 or kept at a level lower than that prescribed by a comparator 23 for a period of time longer than that set by a timer 24, an abnormal signal is outputted via an OR element 25. Thus it is possible to detect the abnormality of an arithmetic controller 12 or a comparator 11. In such a way, the internal trouble can be quickly and surely detected with an operating device abnormality detector 14 and a controller.
Inventors:
IMAIZUMI SHINICHI
FUKUTOMI KOICHI
SAWAZATO MASAHIRO
FUKUTOMI KOICHI
SAWAZATO MASAHIRO
Application Number:
JP11108186A
Publication Date:
November 20, 1987
Filing Date:
May 15, 1986
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD
International Classes:
G05B23/02; H02P9/14; (IPC1-7): G05B23/02; H02P9/14
Domestic Patent References:
| JPS6019206A | 1985-01-31 | |||
| JPS51140080A | 1976-12-02 |
Attorney, Agent or Firm:
Iwao Yamaguchi