PURPOSE: To decrease the number of externally mounted components to an IC without any clock signal generating circuit especially by constituting an intermediate frequency transformer of an AM receiver with a switched capacitor filter and obtaining a clock signal driving the switched capacitor filter from a frequency signal of a PLL synthesizer.

CONSTITUTION: A mixing circuit 23 mixes frequencies of a reception signal fo and a local signal fL and applies an intermediate frequency signal If of 455kHz in frequency to a band pass filter 25. The band pass filter 25 consists of a switched capacitor filter (SCF). Then clock signals , ' of the SCF acting as the band pass filter 25 are obtained without any special generating means. That is, a reference frequency signal fref is fed to a frequency divider 26 and a prescaler 30 via a line l1. A frequency divider 26 and an inverter 27 applies frequency division to the reference frequency signal fref to obtain the clock signals , '. It is desirable that the frequency of the clock signals , ' is in the relation of >455kHz×2, because the center frequency of the intermediate frequency signal is 455kHz and the frequency divider 26 is set to the frequency dividing ratio to satisfy this condition.