Title:
TWO-MODULUS PRESCALER CIRCUIT
Document Type and Number:
Japanese Patent JP3857916
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To make it possible to be operated with a small signal amplitude and reduce power consumption in a two-modulus prescaler circuit available for a frequency synthesizer or the like.
SOLUTION: The prescaler circuit is provided with n pieces of (n≥3) DFF and first and second multi-input logic gates having at least two inputs and configured to connect the output terminal of the first multi-input logic gate to the data input terminal of the first DFF, to respectively connect the output terminals of first to (n-2)th DFF to the data input terminals of the second to (n-1)th DFF, to connect the output terminal of the (n-1)th DFF and the output terminal of the n-th DFF to the input terminal of the first multi-input logic gate, to connect the output terminal of the (n-1)th DFF to the second multi-input logic gate, to input a switching signal thereto and to connect the output terminal of the second multi-input logic gate to the data input terminal of the n-th DFF, and all the connections are connection to use differential signals.
Inventors:
Akihiro Yamagishi
Tsuneo Tsukahara
Yukio Shinbo
Tsuneo Tsukahara
Yukio Shinbo
Application Number:
JP2001386873A
Publication Date:
December 13, 2006
Filing Date:
December 20, 2001
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
NTT Electronics Corporation
NTT Electronics Corporation
International Classes:
H03K21/00; H03K23/64; H03K23/66; (IPC1-7): H03K21/00; H03K23/64
Domestic Patent References:
| JP4239222A | ||||
| JP8204541A | ||||
| JP2000049590A |
Attorney, Agent or Firm:
Kenji Okada
Takumi Iritono
Yasushi Motoyama
Takumi Iritono
Yasushi Motoyama
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