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Patent Searching and Data


Title:
TWO-MODULUS PRESCALER
Document Type and Number:
Japanese Patent JPH07221633
Kind Code:
A
Abstract:

PURPOSE: To reduce power consumption while enabling the high-speed operation of a variable frequency division part.

CONSTITUTION: This prescaler is provided with a variable frequency division means 1 composed of plural flip-flops for outputting (n) or (n+1) frequency division output based on first control signals, an expansion means 2 for frequency dividing the output of the variable frequency division means 1 to (m) and outputting N frequency division or (N+1) frequency division output, a feedback means 3 for supplying the first control signals for controlling the output of the flip-flop of the final stage of the variable frequency division means 1 to the variable frequency division means 1 based on the output of the expansion means 2 and second control signals and a control means 4 for controlling a voltage to be supplied to the flip-flop of the final stage of the variable frequency division means 1 based on the output of the expansion means 2, and (n), (m) and N are integers satisfying (n)×(m)=N.


Inventors:
MIYATA TADAYUKI
WATANABE YU
Application Number:
JP884794A
Publication Date:
August 18, 1995
Filing Date:
January 28, 1994
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K23/66; H03L7/06; (IPC1-7): H03K23/66; H03L7/06
Attorney, Agent or Firm:
Tadahiko Ito