To enhance surge resistance by setting the lifetime of the surface of emitter region directly under a corner part shorter than that directly under the emitter thereby preventing concentration of current to the vicinity of corner part of the emitter region.

A base region 2 is exposed on the opposite major surface sides of a semiconductor substrate 1, an emitter region 3 is exposed to the surface layer thereof and a main electrode 4 touches the base region 2 and the emitter region 3 commonly on the opposite major surface sides. In such a structure, surge resistance can be enhanced by controlling the lifetime. More specifically, the base region (or collector region) directly under the corner of the emitter region 3 and the lifetime in the vicinity thereof are reduced. Consequently, current amplification Factor of a transistor is decreased directly under the corner of the emitter region 3 and current flow is retarded in that region. Since a surge current 14 flows through a region other than the vicinity of corner of the emitter region 3, concentration of current can be relaxed.