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Patent Searching and Data


Title:
TWO-WAY CHANNEL CLOCK SELECTION SYSTEM
Document Type and Number:
Japanese Patent JPH08204688
Kind Code:
A
Abstract:

PURPOSE: To use a line terminal clock generating section in common for all channels in an interface package (line set) having plural interface channels when a clock is selected in the 2-way channel selection device.

CONSTITUTION: In the line set having plural interface channels mounted to the device selecting two-way channels, a clock interrupt detection section 7 monitoring clock interruption in two-way channels when an in-device subordinate clock synchronizing a line terminal clock is selected from two paths, a clock system selection section 12 selecting a clock system by clock interruption of the selected clock system and a line terminal clock generating section 11 generating the line terminal clock subordinate to the selected clock are provided in common to all interface channels to select subordinate clock system of plural interfaces altogether.


Inventors:
OOTSUKI RIYOUICHI
Application Number:
JP1114995A
Publication Date:
August 09, 1996
Filing Date:
January 27, 1995
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L1/22; G06F1/04; H04L7/00; H04L7/04; (IPC1-7): H04L7/00; H04L1/22; H04L7/04
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)