Title:
マルチレベルで成形された素子及び空間充填して成形された素子を使用するアンダーサンプリングされたマイクロストリップアレー
Document Type and Number:
Japanese Patent JP2005533446
Kind Code:
A
Abstract:
An undersampled microstrip array using multilevel and space-filling shaped patch elements based on a fractal geometry achieves within the same electrical area, the same directivity than can be obtained using conventional elements as square or circular-shaped patches. However, the number of elements for the fractal-based array is less, reducing the complexity of the feeding network and overall array. Mutual coupling can be reduced avoiding radiation pattern distortions. Higher gain than that obtained using classical patch elements within the same electrical can be achieved due to the less complexity in the feeding network.
Inventors:
Haume Angela Pross
Carles Puente Barialda
Maria-Carmen Borja Borau
Carles Puente Barialda
Maria-Carmen Borja Borau
Application Number:
JP2004522141A
Publication Date:
November 04, 2005
Filing Date:
July 15, 2002
Export Citation:
Assignee:
FRACTUS, S.A.
International Classes:
H01Q21/12; H01Q1/36; H01Q1/38; H01Q1/40; H01Q5/00; H01Q5/357; H01Q9/04; H01Q9/06; H01Q13/08; H01Q21/06; H01Q21/20; H01Q21/30; (IPC1-7): H01Q21/12; H01Q13/08; H01Q21/20
Attorney, Agent or Firm:
Osamu Kawamiya
Masahiro Ishino
Masahiro Ishino