Title:
UNINTERRUPTIBLE MEMORY SLIP ALARM DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH08149115
Kind Code:
A
Abstract:
PURPOSE: To provide an uninterruptible memory slip alarm detection circuit in which configuration is simplified and the scale reduction is realized.
CONSTITUTION: An S-R circuit 4 collates timewise positions of write signals C, D used to write transmission data of two systems to storage circuits 1, 2 and outputs a square signal L, then one comparator circuit being the S-R circuit 4 is enough. A register circuit 5 samples the square wave signal L by a read signal E to output a level amount M of the square wave signal L and a level change detection circuit 6 detects a prescribed change in the level amount M to be in error to obtain an alarm signal N.
Inventors:
TAMAI HIDEAKI
MATSUOKA MINORU
MATSUOKA MINORU
Application Number:
JP28468694A
Publication Date:
June 07, 1996
Filing Date:
November 18, 1994
Export Citation:
Assignee:
NIPPON ELECTRIC ENG
International Classes:
H04L1/22; H04J3/00; H04L69/40; (IPC1-7): H04L1/22; H04J3/00; H04L29/14
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)