PURPOSE: To recover the width of an effective pulse after an unnecessary pulse is eliminated up to the pulse width at input by adding a pulse width recovering delay circuit and an AND circuit.

CONSTITUTION: The pulse width of an output signal 5 from an OR circuit 2 is reduced by a delay time's share of an unnecessary pulse eliminating delay circuit 1. The output signal 5 is branched; one is fed to an AND circuit 7 via a pulse width recovering delay circuit 6 and the other is fed thereto directly. The delay time of delay circuits 1, 6 is set equally in this case. Since the leading of an output signal 9 of the AND circuit 7 is restricted by the leading of an output signal 8 of the delay circuit 6, the pulse width of the output signal 9 is recovered surely. Then the pulse width of the effective pulse after the unnecessary pulse is removed is recovered to the pulse width at input.